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Title:
PEAK SUPPRESSION CIRCUIT
Document Type and Number:
Japanese Patent JP2014027343
Kind Code:
A
Abstract:

To provide a peak suppression circuit capable of reducing a circuit scale of band limit of impulse signal, while improving adjacent channel leakage power ratio when peak signal having power being higher than average power is suppressed.

A peak suppression circuit L comprises: a peak signal detection part 4 for detecting peak signal having a peak intensity being larger than intensity threshold, in multi-carrier signal; an impulse signal generation part 5 for generating impulse signal at peak time of the peak signal detected by the peak signal detection part 4; a complex FIR filter part 13 for performing the band limit on the impulse signal generated from the impulse signal generation part 5 within a range of band of each of single carrier signals forming the multi-carrier signal; and a peak signal suppression circuit 10 for subtracting the impulse signal after the band limit in the complex FIR filter part 13 from the multi-carrier signal and suppressing the peak signal in the multi-carrier signal.


Inventors:
WATANABE TAKASHI
HIRAYAMA HIROHISA
SASAKI TAKAYOSHI
Application Number:
JP2012163700A
Publication Date:
February 06, 2014
Filing Date:
July 24, 2012
Export Citation:
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Assignee:
JAPAN RADIO CO LTD
International Classes:
H04L27/38; H03G11/00; H03H17/02
Domestic Patent References:
JP2010050765A2010-03-04
JP2010226589A2010-10-07
Foreign References:
WO2010074187A12010-07-01
Attorney, Agent or Firm:
Kenji Okada
Katsuhiro Imashita