PURPOSE: To evaluate performance without any load by providing a counter memory which is accessed by the same signal as an address signal for access to an objective program, and forming an instruction counter memory area in the same address with an objective instruction.

CONSTITUTION: When the program memory of a main storage device 7 is read and a program 8 is executed, the counter memory 10 wherein the counter memory area is formed at a corresponding location is accessed by the same address signal, and the counted value in the counter memory area 11 count up at every time of the access. The load and execution frequency of the objective program are known, address by address, from the counted value in the objective counter memory area in the counter memory 10 after the execution of the program 8. Consequently, the performance evaluation in the execution of the program is performed without changing modules of the objective program nor exerting any influence upon the execution time of the objective program.