Title:
PERMEATIVE GATE TRANSISTOR
Document Type and Number:
Japanese Patent JPS62133767
Kind Code:
A
Abstract:
A field effect transistor comprises a semiconductor body having two major surfaces and including a substrate and an active region of one conductivity type forming a channel at one of the major surfaces. Elongated source and drain formations extend substantially parallel to a predetermined direction at the one major surface in juxtaposition with the active region and spaced from one another transversely to the predetermined direction. An elongated permeable gate formation is disposed at the one major surface between the source and drain formations in substantial parallelism with the predetermined direction and includes a plurality of gate portions situated at the semiconductor body and spaced from one another in the predetermined direction by predetermined distances to form intervening spaces, and a plurality of connecting portions integral with and interconnecting respective adjacent ones of the gate portions remotely from the body for supplying electric current to the gate portions for depleting respective individual depletion zones of the active region between the adjacent gate portions for controlling the flow of electric current in the channel between the source and drain formations.
Inventors:
EDOWAADO ROORENSU GURIFUIN
Application Number:
JP28611186A
Publication Date:
June 16, 1987
Filing Date:
December 02, 1986
Export Citation:
Assignee:
ITT
International Classes:
H01L21/338; H01L29/423; H01L29/812; (IPC1-7): H01L29/80
Attorney, Agent or Firm:
Takehiko Suzue