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Title:
PHASE CONTROL CIRCUIT
Document Type and Number:
Japanese Patent JPH03273709
Kind Code:
A
Abstract:

PURPOSE: To secure the coincidence of frequency stability between a phase control circuit and a source oscillator by selecting a signal of the corresponding phase out of a delay circuit equivalent to one cycle of an input signal to be controlled by means of a selector and an up-down counter of an (n) modulo.

CONSTITUTION: The waveform of an input signal SIG to be controlled is sampled by a delay circuit 11 and delayed by an extent equivalent to one cycle. Then each tap of the circuit 11 is set opposite to the value held by an up-down counter 13. A sample of the phase value shown by the counter 13 is taken out of the corresponding tap of the circuit 11 by a selector 12. As the counter 13 serves an n-notation counter, the total (n) pieces of signals, i.e., (n) phases of signals which are delayed every 1/n cyles of the signal SIG are obtained and selected by the selector 12. Thus a signal having the corresponding phase is selected out of the circuit 11 equivalent to one cycle of the signal SIG. As a result, the coincidence of frequency coincidence is secured between a phase control circuit and a source oscillator.


Inventors:
YAMADA KUNIHIRO
Application Number:
JP17805890A
Publication Date:
December 04, 1991
Filing Date:
July 05, 1990
Export Citation:
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Assignee:
RICOH KK
International Classes:
H03L7/00; H03K23/64; (IPC1-7): H03K23/64; H03L7/00
Attorney, Agent or Firm:
Akira Kashiwagi



 
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