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Patent Searching and Data


Title:
PHASE DETECTING CIRCUIT
Document Type and Number:
Japanese Patent JPS61234687
Kind Code:
A
Abstract:

PURPOSE: To enhance the resistance to noise and the detection sensitivity even if a supply voltage is low, by subjecting a phase detection signal corresponding to the phase difference between a burst signal in a carrier chrominance signal and a reference chrominance subcarrier to exponential expansion after logarithmic compression.

CONSTITUTION: The carrier chrominance signal inputted to an input terminal 1 is supplied to a burst gate circuit 2, and the burst signal is separated by a burst gate pulse and is supplied to a phase detector 4. The reference chrominance subcarrier inputted from a terminal 5 has the phase compared with the phase of the burst signal, and the phase detection signal having a level corresponding to the phase difference is supplied to a logarithmic compression circuit 9. The signal which has the amplitude subjected to logarithmic compression by the circuit 9 has the level shifted by a DC level shifting circuit 10 and has the amplitude restored by an exponential expansion amplifying circuit 11. Thereafter, only the phase detection signal is taken out by a burst gate circuit 12 and is outputted to an output terminal 13 through a low pass filter 6.


Inventors:
HAYAKAWA MITSURU
Application Number:
JP7608885A
Publication Date:
October 18, 1986
Filing Date:
April 10, 1985
Export Citation:
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Assignee:
VICTOR COMPANY OF JAPAN
International Classes:
H04N9/45; (IPC1-7): H04N9/45
Attorney, Agent or Firm:
Tadahiko Ito