PURPOSE: To detect lead/lag of a phase of both the 1st and 2nd signals by inputting an output from an EX-OR gate to which the 1st and 2nd signals and an output from an FF circuit latching the level of the 2nd signal at the changing point of time of the 1st signal to a gate circuit and operating it.

CONSTITUTION: Suppose that a reference signal Is and a measured signal Im whose phase is retarded by W1 than that of the signal Is are inputted. An output of the EX-OR gate 10 is at level (a). On the other hand, an output from a D-FF11 remains 'H' as shown in figure (b). Thus, a pulse signal whose level is 'H' during the period W1 only and 'L' for the remaining period W2 is led to a display circuit 15 from an AND gate 12 as shown in figure (c). On the other hand, the output of the gate 13 remains 'L' as shown in figure (d). Thus, it is informed by display circuits 15, 16 that the phase of the signal Im is delayed than that of the signal Is.