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Title:
PHASE DIFFERENCE CONTROLLER
Document Type and Number:
Japanese Patent JPS5924412
Kind Code:
A
Abstract:

PURPOSE: To perform precise signal conversion adaptively to PCM recording and reproduction by discriminating the distance between a data synchronizing signal and a synchronizing signal which varies with time in the form of the number of included clocks, and controlling either or both of means of slice level control and signal delay according to the discrimination output.

CONSTITUTION: A PCM signal applied to an input terminal 1 is in format conforming to a standard television signal and one horizontal period corresponds to 168 bits. In this case, synchronizing signals of different kind are a 13-bit synchronizing signal and a 3-bit data synchronizing signal starting after 3 bits of the former synchronizing signal. The distance (phase difference T) between those two synchronizing signals corresponds to 24 bits between the 6th bit of the synchronizing signal and the 3rd bit of the data syncrhonizing signal as a standard. Phase-difference detection signals E and G are fed back through integrators 7 and 9 respectively. When the phase-difference detection signal E is at "H", the distance between the synchronizing signal C and data signal B is short and the signal before the data signal B is extracted is delayed by the output of the integrator 7. Thus, the distance between the synchronizing signal c and data signal B is held invariably constant, i.e. sliced to an invariable specific phase difference and outputted.


Inventors:
EGUCHI TAKASHI
HAGIWARA SHIGERU
HIROTA YUTAKA
Application Number:
JP13347382A
Publication Date:
February 08, 1984
Filing Date:
July 29, 1982
Export Citation:
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Assignee:
MATSUSHITA ELECTRIC IND CO LTD
International Classes:
G11B20/14; G11B20/10; H03K5/26; (IPC1-7): G11B3/00; G11B5/09; G11B7/00; G11B11/00; H03K5/26
Attorney, Agent or Firm:
Toshio Nakao



 
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