PURPOSE: To enable highly accurate detection regardless of the polarity in the phase difference and fine difference in the phase, by driving a reversible counter according to the advance or delay signal while a phase comparator outputs a phase difference signal.

CONSTITUTION: As a D flip-flop 15 samples the input A at the rising edge of the input B, the output thereof is a low level when the input A delays from the input B; while it is a high level when the input advances therefrom. The advance/delay signal is applied to an input terminal 21 to determine the increment or decrement of a increment/decrement counter 25. On the other hand, an exclusive OR circuit 16 outputs a pulse with the length thereof equal to the phase difference between the two inputs A and B to an enable input terminal 22 of the counter 25. Since a clock not correlated to the two inputs A and B is applied to the counter 25 at a terminal 23, a value proportional to the phase difference between the inputs A and B is obtained as the value of the increment/decrement counter 25 from an output terminal.