PURPOSE: To enhance phase difference detection accuracy, by providing a frequency dividing means dividing the frequency of a gate output pulse and counting the frequency dividing pulse of said frequency dividing means.

CONSTITUTION: The clock pulse frequency of a clock pulse generator 2 is selected to the frequency corresponding to high detection accuracy required. This clock pulse is gated in gate circuit 1 for a period equal to the phase difference of signals A, B to be measured and the frequency thereof is divided by a frequency dividing circuit 4. The frequency dividing value of the circuit 4 at this time is selected to the value corresponding to desired display accuracy required. The fore, the counter circuit 3 of the next stage can be constituted of a counter having function corresponding to the desired display accuracy and, as a subtraction counter for the comparison with an external set value, the counter having function corresponding to desired display accuracy can be also used. By this method, phase difference detection accuracy can be enhanced.