PURPOSE: To shorten a time for detection, to reduce an error in discrimination and to make a device small in size, by a construction wherein a high-speed pulse signal is counted in a prescribed number, so as to set a reset-set FF, only when a pulse signal corresponding to a phase difference between two signals is ON.
CONSTITUTION: When signals S1 and S2 are inputted to input terminals 11a and 11b, a pulse signal S5 corresponding to a phase difference between them is outputted from an exclusive-OR circuit 2. A counter 21 counts a signal S8 from a high-speed pulse signal generator 22 only when the signal S5 inputted thereto is ON, and turns an output signal S9 ON when it counts up the signal S8 for a phase difference to be used as a reference. Then a reset-set FF 25 is set and an output signal S11 is turned ON. Therefore it is seen that the phase difference occurs between the signals S1 and S2. Besides, a counter 24 is reset when the signal S9 is turned ON, and turns an output signal S10 ON when it counts up the signal S8 in a prescribed number. Since the FF 25 is reset then, the signal S11 is turned OFF unless the signal S9 turns ON within a prescribed time, and a return is made to the initial state.
WO/2004/100379 | PLL CIRCUIT |
JPS59146203 | CURRENT MIRROR CIRCUIT FOR PHASE COMPARISON CIRCUIT |