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Title:
PHASE LOCK CIRCUIT
Document Type and Number:
Japanese Patent JP2005348208
Kind Code:
A
Abstract:

To provide a phase lock circuit which distinguishes positive/negative frequency of a complex signal to lock a phase.

A second complex signal Vlo has the negative frequency of amplitude according to a feedback control signal Vc. In a complex signal processor 100, a signal according to the deviation of the complex signal obtained when this second complex signal Vlo and the first complex signal Vin are multiplied, is generated. When the second complex signal Vlo and the first complex signal are multiplied, its deviation angle becomes equal to that obtained by adding the deviation angles of these two complex signals. Accordingly, in the complex signal processor 100, the signal obtained by adding the deviation angles is generated. In the feedback unit 200, a feedback control signal Vc which operates the feedback control is generated so that the added deviation angle falls within a predetermined value. Thereby, the second complex signal Vlo is phase-locked only to the component of the positive frequency obtained by canceling by the negative frequency out of the components of the positive and negative frequencies included in the first complex signal Vin.


Inventors:
KATAKURA MASAYUKI
Application Number:
JP2004166998A
Publication Date:
December 15, 2005
Filing Date:
June 04, 2004
Export Citation:
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Assignee:
SONY CORP
International Classes:
G01D5/245; H03C3/09; H03D3/24; H03D7/00; H03D13/00; H03L7/06; H03L7/07; H03L7/085; H03L7/087; H04B1/26; (IPC1-7): H03L7/06; G01D5/245; H03D7/00; H03D13/00; H04B1/26
Attorney, Agent or Firm:
Takahisa Sato