Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
PHASE LOCKED CIRCUIT
Document Type and Number:
Japanese Patent JPH07193494
Kind Code:
A
Abstract:

PURPOSE: To perform a phase lock operation at high speed by enabling the wide variable control of a frequency pull-in operation and a phase pull-in operation.

CONSTITUTION: This circuit is provided with a voltage controlled oscillator(VCO) 13, phase comparator 11 for comparing the phase of a reference signal with that of an output from the VCO 13 and outputting a phase difference signal, loop filter 12 and sample/hold circuit (storage means) 16. When a phase difference is detected by a rise edge detection circuit (first control means) 15, the output of the loop filter 12 is stored in the sample/hold circuit 16. A switch 18 is interposed between the sample/hold circuit 16 and the output side of the loop filter 12 and when no phase difference is detected any more, the switch 18 is put into a conductive state by a NOR circuit (second control means) 17. For the long phase difference signal, the frequency pull-in operation is preferentially performed, and concerning the short phase difference signal the phase difference pull-in operation is preferentially performed. Thus the phase operation is accelerated.


Inventors:
MICHIMASA SHIRO
Application Number:
JP33106793A
Publication Date:
July 28, 1995
Filing Date:
December 27, 1993
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
MATSUSHITA ELECTRIC IND CO LTD
International Classes:
H03L7/093; H03L7/113; (IPC1-7): H03L7/093; H03L7/113
Attorney, Agent or Firm:
Hiroshi Maeda (2 outside)