To provide a phase-locked loop circuit which can suppress jitters of the phase generated from the output of its voltage-controlled oscillator.

In the phase-locked loop circuit, by delaying respectively a reference signal 81 and a feedback signal 91 with delay circuits 71, 72, and by comparing with each other the phases of a delayed reference signal 82 and a delayed feedback signal 92, the phase difference between them is converted into a current by a second charge-pump circuit 22 so as to make the current flow in a low-pass filter 31. Thereby, the response current to the phase difference can be also made to flow in the low-pass filter 31 in a delayed timing so as to increase the number of the pulse currents for conducting charging/ discharging of the capacitor of the low-pass filter 31.