PURPOSE: To attain high phase lock speed at frequency changeover in the phase locked loop circuit.

CONSTITUTION: An output signal of a crystal oscillator 1 is frequency-divided by a 1st variable frequency divider 7 and the resulting signal is used for a reference frequency signal, an output signal of a voltage controlled oscillator 5 is frequency-divided by a 2nd variable frequency divider 8 and the phase of the resulting signal is compared with a phase of the reference frequency signal and phase-lock loop is controlled for the voltage controlled oscillator 5 by an error signal being a phase comparison result in the phase locked loop circuit, which is provided with a control means 9 controlling the two variable frequency dividers 7, 8 in response to a pulse width of the error signal to vary a phase comparison frequency only at the time of changeover.