To provide a phase locked loop circuit which makes it difficult for noise to appear on an LCD screen even when there is a jitter in a sampling clock.

A phase locked loop circuit has a phase comparator 8 which compares phases of a horizontal synchronizing signal and a variable signal and detects phase difference, a low-pass filter 9 which passes a low frequency component of a phase difference signal detected by the comparator 8 as control voltage, a voltage controlled oscillator 10 which makes control voltage from the filter 9 an input and converts it into a frequency based on the control voltage and a frequency demultiplier 11 which divides an output signal from the oscillator 10 and inputs a variable signal to the comparator 8. In such cases, a phase adjusting circuit 1 which operates as a video signal superimposing part that superimposes a video signal on control voltage which is inputted to the oscillator 10 is provided.