PURPOSE: To superimpose monitor information of a digital regenerative repeater onto a digital main signal by using a clock part or a clock not subject to phase modulation for the identification of '0', '1' of a data, and using the clock part or clock subject to phase modulation for the identification of an output data phase.

CONSTITUTION: A required phase modulation is applied to only the rise part of a clock from a timing extraction circuit 11 by internal monitor information from an internal monitor generating section 13 in a clock phase modulation circuit 12. Then a master latch 81 latches a data in the fall timing not subject to phase modulation of the clock 1 to apply '0', '1' identification of the data, and a slave latch 82 latches an output from the master latch 81 in the rise timing of the clock 2 retarded by a required time subject to phase modulation to apply required phase modulation to the output data. Thus, the internal monitor information is superimposed on the digital main signal from a digital signal identification regenerative circuit 8.