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Title:
PHASE SYNCHRONIZING SYSTEM FOR VFO
Document Type and Number:
Japanese Patent JPH04186925
Kind Code:
A
Abstract:

PURPOSE: To execute the lead-in by an arbitrary pattern by using a system for measuring the edge interval of an input pattern signal, and setting a result of operation by the known number of VCO output pulses to an initial VCO output oscillation number.

CONSTITUTION: A phase comparison signal DATA-SS 6 is set by the falling edge of an external input signal PKDT 5, and reset, when a system clock 12 is counted by the number portion of a mean value calculating part output 8. A phase comparator 40 receives the DATA-SS 6 and a VFO output 9, detects a phase difference between two signals and converts it to a signal. A VCO part 80 receives the mean value calculating part output 8, a phase difference detector output 15 and the system clock 12, and counts the system clock 12 by the number portion of the mean value calculating part output 8. By switching the polarity at the time when counting is finished, the VFO output 9 seems to be oscillating. In such a manner, the VFO can be led-in, when the input pattern is a continuous pattern, and a feature by which a malfunction does not occur at the time of lead-in can be added.


Inventors:
YAGISAWA TADASHI
MIYASAKA HIDEKI
Application Number:
JP31397990A
Publication Date:
July 03, 1992
Filing Date:
November 21, 1990
Export Citation:
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Assignee:
HITACHI LTD
International Classes:
G11B20/14; H03L7/08; (IPC1-7): G11B20/14; H03L7/08
Attorney, Agent or Firm:
Katsuo Ogawa (1 person outside)



 
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