Title:
PHASE WARRANT CIRCUIT
Document Type and Number:
Japanese Patent JP3424601
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide a pulse phase warrant circuit using a PLO that corrects a phase due to phase fluctuations.
SOLUTION: A phase control circuit 20 compares a received FPI signal with an FP2 signal, monitors the width of a phase shift on the basis of designated FP phase difference data, and instructs a frequency divider circuit 18 to change the period width of a phase of a COMP 2 signal that is given from the frequency divider circuit 18 to a digital PLL circuit 12, when a digital PLL circuit 12 is stable. The digital PLL circuit 12 changes the control voltage of an oscillator 14, when a phase of a COMP 1 is deviated from a phase of the COMP 2 so as to restore the phase to the original phase. Thus, the phase of the FP 2 signal with respect to the phase of the FP1 is changed by the phase width shifted by the frequency divider circuit 18.
Inventors:
Hiroshi Kariya
Application Number:
JP13692399A
Publication Date:
July 07, 2003
Filing Date:
May 18, 1999
Export Citation:
Assignee:
NEC
International Classes:
H03L7/08; H04L7/033; (IPC1-7): H04L7/033; H03L7/08
Domestic Patent References:
| JP1127247A | ||||
| JP6104885A | ||||
| JP3149928A | ||||
| JP10257040A | ||||
| JP614016A | ||||
| JP3236648A |
Attorney, Agent or Firm:
Yoshiyuki Iwasa