PURPOSE: To largely reduce FPN (Fixed Pattern Noise) due to element shape, by removing corners of flat planes on respective semiconductor regions in which photo-sensor cells and/or peripheral circuit elements are composed.

CONSTITUTION: A p-well 201 is formed by using a mask 109 with corners essen tially removed and by ion-implantation or thermal-diffusion method or the like. Successively, a gate oxidizing film 202 is formed, and then patterning formation of a polysilicon gate electrode 203 is performed. N type impurity ions are implanted in the p-well 201 surface, with the patterning resist and gate electrode 203 serving as masks. And successive heat treatment enables source . drain regions 204 and 205 to be formed in self-matching states. The source . drain regions 204 and 205 are formed in shapes such that their corners are essentially removed except on the functional parts for determining channel length. By essentially removing the corners in this way, concentration of electric fields becomes moderate, and besides scattering of electric fields and junction capacities, due to scattering of corner shapes formed in diffusion and etching processes on the semiconductor region, can be reduced.