Title:
PHOTOLITHOGRAPHY TEST STRUCTURE AND INTEGRATED CIRCUIT PHOTOLITHOGRAPHY TEST STRUCTURE
Document Type and Number:
Japanese Patent JPH06314727
Kind Code:
A
Abstract:
PURPOSE: To accurately measure wiring width by applying a current through a wiring formed from a test structure, and also measure voltage applied on the wiring by providing a pair of conductive pads deposited on a substrate and connected with opposite ends of the wiring structure. CONSTITUTION: A test structure 50 includes at least one test area constructed between a pair of conductive pads 54. The pads 54 are connected at opposite ends of a wiring structure 56. A control structure 60 is also provided, having at least one control test 62 constructed between the pair of the conductive pads. The pads 54 are disposed for receiving a current provided by power supplies I1 , I2 , I3 . Selection pads are roped with voltage meters V1 , V2 , V3 , and V4 to define voltage applied across the wiring structure between the pads. A change in resistance of the test area can be measured by substantially equally setting a corresponding driving current over the test and control areas.
Inventors:
HAWAADO ESU GOODO
DERITSUKU JIEI RISUTAAZU
JIEIMUZU EICHI HATSUSEI JIYUNI
MAIKERU EI HIRISU
UIRIAMU SHII CHIYATSUPUMAN
DERITSUKU JIEI RISUTAAZU
JIEIMUZU EICHI HATSUSEI JIYUNI
MAIKERU EI HIRISU
UIRIAMU SHII CHIYATSUPUMAN
Application Number:
JP2527594A
Publication Date:
November 08, 1994
Filing Date:
February 23, 1994
Export Citation:
Assignee:
ADVANCED MICRO DEVICES INC
International Classes:
G03F7/20; H01L21/66; H01L23/544; (IPC1-7): H01L21/66
Attorney, Agent or Firm:
Fukami Hisaro (3 outside)