Title:
PICTURE PROCESSOR
Document Type and Number:
Japanese Patent JP3468306
Kind Code:
B2
Abstract:
PURPOSE: To attain proper monitor without projecting a horizontal blanking period on the screen of a television monitor by constituting a television monitor synchronizing signal generating circuit in which the timing setting of a synchronizing signal for a television monitor can be varied.
CONSTITUTION: A sync delay CLK generator 50 generates a sync synchronizing CLK 4 in a timing delayed from an HCLK signal only in a prescribed time. This delay timing can be adjusted by selecting a set value stored in a sync delay register 20. Therefore, even at the time of monitoring a picture signal 8 of a picture memory 90 or a real time picture signal 9 obtained from a CCD 100, a horizontal synchronizing pulse can be matched with the horizontal blanking period of the picture signal 8 by adjusting the timing of the sync synchronizing CLK 4 being the synchronizing signal for the television monitor according to the timing of the picture signal 8 of the picture memory 90 or the real time picture signal 9 only in the prescribed time.
Inventors:
Mitsuo Kuwahara
Application Number:
JP18025793A
Publication Date:
November 17, 2003
Filing Date:
July 21, 1993
Export Citation:
Assignee:
Advantest Corporation
International Classes:
G09G5/12; H04N5/06; H04N5/073; H04N5/66; (IPC1-7): H04N5/06
Domestic Patent References:
| JP5115014A | ||||
| JP6462116A |
Attorney, Agent or Firm:
Kusano Taku (1 person outside)