PURPOSE: To enable a light quantity modulation within a picture element by making an output clock higher than an input clock to a gradation processing means.

CONSTITUTION: Six-bit multilevel picture data VIDO 6 is latched to a latch circuit 1 by a video clock VCLK 7 with a constant cycle transmitted from a host. The latched multilevel picture data 6 is inputted as the address signal of a table memory 5 and a table memory 105. A video clock 7 triggers a synchronizing oscillaltor 2 and an output counts up a main scanning counter 3. At this point, a main scanning counter 3 expresses the counted value by a parallel binary 4-bit and the 4-bit data is inputted in the upper side of the bit in which the 6-bit multilevel picture data of the table memory 5 and the table memory 105 is inputted. The main scanning counter 3 is reset by a horizontal synchronizing signal HSYNC8.