Title:
PICTURE PROCESSOR
Document Type and Number:
Japanese Patent JPS61136174
Kind Code:
A
Abstract:
PURPOSE:To break the cyclic property of a dither matrix for the suppression of moire by advancing or delaying the phase of the generation pattern of the dither matrix by a prescribed amount when the density difference produced between periods before and after the dither processing exceeds the prescribed threshold value. CONSTITUTION:An input picture signal is turned into a binary picture signal 3 by a dither circuit 2. The circuit 2 performs a binary coding operation by the dither threshold value designated by an address generating part 12. The block adders 4 and 5 produce the sums 6 and 7 of picture signals of the prescribed block obtained before and after the dither processing. A difference signal 9 obtained by subtracting the sum signal 7 from the sum signal 6 is coded properly by a quantizing circuit 10. This quantized signal 11 is defined as the phase correction amount of the main scan direction address produced by the part 12. Thus the phase modulation is given to the generation of the dither threshold value of the main scan direction to the next block. Thus the cyclic property of the dither matrix is broken in the main scan direction. As a result, the moire produced by the interference between said cycle property and the cycle property secured at a melting point can be suppressed.
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Inventors:
MITA YOSHINOBU
Application Number:
JP25737584A
Publication Date:
June 24, 1986
Filing Date:
December 07, 1984
Export Citation:
Assignee:
CANON KK
International Classes:
G06T5/00; (IPC1-7): G06F15/62
Attorney, Agent or Firm:
Yasunori Otsuka