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Title:
PICTURE QUALITY ADJUSTMENT CIRCUIT
Document Type and Number:
Japanese Patent JPH0522633
Kind Code:
A
Abstract:

PURPOSE: To obtain a picture quality adjustment circuit which has a simple configulation and produces no error of timing for generating the asymmetrical secondary differential signals.

CONSTITUTION: A buffer circuit 11 receives the secondary differential signal of a luminance signal and then outputs it after the amplification or the input/ output impedance conversion. A clip circuit 12 clips the secondary differential signal and outputs it. A signal inverting circuit 13 inverts the secondary differential signal and outputs it. A synthetic resistance 14 adds together the output signal of the circuit 11 and the output signal of the circuit 12 in a ratio of 1:(1-K) where 0≤K≤1 is defined. Meanwhile, a synthetic resistance 15 adds together the output signal of the resistance 14 and the output signal of the circuit 13 in a ratio of 1:(1-L) where 0≤L≤1 is defined. Thus the asymmetrical secondary differential signals are obtained. An adder 16 adds the asymmetrical differential signals to the luminance signal.


Inventors:
SAKAGUCHI TAKASHI
Application Number:
JP17225991A
Publication Date:
January 29, 1993
Filing Date:
July 12, 1991
Export Citation:
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Assignee:
TOSHIBA CORP
International Classes:
H04N5/208; (IPC1-7): H04N5/208
Attorney, Agent or Firm:
Takehiko Suzue



 
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