PURPOSE: To store a picture at a high speed in a certain time and to select the standard mode and the high speed mode by providing a mode discriminating circuit, a coordinate storage circuit, a coordinate comparing circuit, and a frame memory control circuit.

CONSTITUTION: A mode discriminating circuit 5, a frame memory 9 where picture information is stored, a coordinate storage circuit 7, a coordinate comparing circuit 8, and a frame memory control circuit 6 are provided. Consequently, pictures from the vertical-direction coordinate just after the start of picture taking-in to the vertical-direction coordinate of the next frame are stored as one picture asynchronously with a vertical synchronizing signal. Thus, the picture is stored at a high speed in the certain time, and the first mode as the common standard mode synchronized with the vertical synchronizing signal and the high speed mode are arbitrarily selected.