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Title:
PLASMA ASHING METHOD AND PLASMA ASHING APPARATUS
Document Type and Number:
Japanese Patent JP2011243595
Kind Code:
A
Abstract:

To provide a plasma ashing method and a plasma ashing apparatus capable of promptly removing resist residue while preventing fault occurrence due to the resist residue by applying a plasma ashing process to an ion-implanted resist.

A method for plasma ashing of a resist pattern formed on a semiconductor substrate 109 and ion-implanted disposes the semiconductor substrate 109 in a same chamber 101 and continuously performs a low-temperature resist pattern ashing process that uses a plasma of mixture gas consisting mainly of oxygen and steam, a high-temperature resist pattern ashing process that uses a plasma of mixture gas consisting mainly of oxygen and steam, and a high-temperature resist pattern ashing process that uses a plasma of mixture gas consisting mainly of oxygen, steam, and fluorine-containing gas.


Inventors:
TAMURA KOJI
Application Number:
JP2010111570A
Publication Date:
December 01, 2011
Filing Date:
May 13, 2010
Export Citation:
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Assignee:
SHARP KK
International Classes:
H01L21/3065
Domestic Patent References:
JP2008016811A2008-01-24
JP2006507667A2006-03-02
JP2005236012A2005-09-02
JP2000286248A2000-10-13
JPH0869896A1996-03-12
JP2009164365A2009-07-23
JP2006128148A2006-05-18
JP2001044178A2001-02-16
JP2008016811A2008-01-24
JP2006507667A2006-03-02
JP2005236012A2005-09-02
JP2000286248A2000-10-13
JPH0869896A1996-03-12
JP2009164365A2009-07-23
JP2006128148A2006-05-18
Attorney, Agent or Firm:
Hidesaku Yamamoto
Takaaki Yasumura
Takeshi Oshio