Title:
めっきターミネーション
Document Type and Number:
Japanese Patent JP4425688
Kind Code:
B2
Abstract:
A method of forming electroless plated terminations 78 for electronic components 74, the method comprises steps of: providing a plurality of electronic components, each component includes a plurality of ceramic substrate layers selectively interleaved with a plurality of internal electrode elements 52, 54, wherein selective portions of the internal electrodes are exposed at selected locations along the periphery of the electronic component; providing an electroless bath solution; and immersing said plurality of electronic components in the said bath solution for a predetermined time period such that termination material, such as copper or nickel, is deposited on the electronic component bridging the said exposed selected portions. Preferably the multilayer electronic component has at least one cover layer on the uppermost and bottommost surfaces of the interleaved layers, also known as the internal assembly, thus this structure now forming a monolithic component assembly. The said exposed portions may be tabs 68.
Inventors:
Andrew P. Ritter
Robert Haystand The Second
John El. Galvani
Sri Ram Dattagle
Jeffrey A. Horn
Richard A. Radu
Robert Haystand The Second
John El. Galvani
Sri Ram Dattagle
Jeffrey A. Horn
Richard A. Radu
Application Number:
JP2004114450A
Publication Date:
March 03, 2010
Filing Date:
April 08, 2004
Export Citation:
Assignee:
ABX Corporation
International Classes:
H01G4/12; H01G4/252; B05D5/12; C23C18/16; H01C1/142; H01F5/00; H01F27/29; H01G2/06; H01G4/228; H01G4/232; H01G4/30; H01G4/38; H01G7/00; H01L21/60; H01L23/50; H05K1/09; H05K1/11; H05K3/40
Domestic Patent References:
| JP9129476A | ||||
| JP1293503A | ||||
| JP2294007A | ||||
| JP2001155953A | ||||
| JP2001167969A |
Attorney, Agent or Firm:
Yoshikazu Tani
Kazuo Abe
Kazuo Abe