To provide a PLL circuit capable of quickly making an unlocked state of a frequency of an oscillation signal, while providing the PLL circuit with a plurality of VCOs which have mutually different oscillation frequency bands.

The PLL circuit 11 includes: VCOs 22-1 to 22-8; a VCO output circuit 16; a programmable frequency divider 14; a phase comparator 17; a charge pump 20, a loop filter 21; and a VCO selection circuit 15 for outputting a VCO selection signal so as to successively select oscillation signals outputted from respective VCOs 22-1 to 22-8; and when Vtune enters into a prescribed range for determining VCO selection, fixing the VCO selection signal, wherein when the Vtune does not enter into a prescribed range for determining VCO switching, the VCO selection signal is switched so that the Vtune enters into the prescribed range for determining VCO selection.