To provide a PLL circuit capable of reducing deterioration in phase noise caused by temperature variation.

The PLL circuit 100 includes: a voltage controlled oscillator circuit 81; a frequency divider 82; a phase comparator which compares phases of a reference signal REF-IN and an oscillation signal Output with each other and outputs pulse signals UP, DOWN of pulse widths corresponding to a phase difference; a charge pump 1 with an output current correction function, which outputs CP currents ICPp, ICPn of magnitudes corresponding to the pulse widths of the pulse signals UP, DOWN; a loop filter 85 for controlling a Vt voltage in accordance with the CP currents ICPp, ICPn; and a delay circuit 8 of which the delay time varies in accordance with temperature variation. On the basis of the delay time of the delay circuit 8, the CP current ICPp or ICPn is corrected so that a difference between the CP currents ICPp and ICPn becomes small.