To provide a phase-locked loop (PLL) circuit that has improved characteristics.
The PLL circuit includes: a charge pump for applying a charge/discharge current to an output terminal in response to a charge/discharge signal based on an oscillation signal; a variable resistance having one end connected to the output terminal and constituting a low pass filter; a capacitance having one end connected to the other end of the variable resistance and the other end connected to a ground and constituting the low pass filter; a voltage-current converter for converting a charge pump voltage to a current to output an operating current; a current-controlled oscillator having a plurality of inverters connected in a series ring and supplied with the operating current for operating the inverters to output the oscillation signal having an oscillation frequency controlled in response to the operating current; a first comparison circuit for comparing a filter voltage at the other end of the variable resistance with a first reference voltage and a second reference voltage higher than the first reference voltage; and a control circuit for controlling the number of the inverter stages of the current-controlled oscillator in accordance with comparison signals.
YAMAGUCHI TETSUYA
Yasukazu Sato
Yasushi Kawasaki
Takeshi Sekine
Akaoka Akira
Tomoya Deguchi
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