PURPOSE: To prevent the pulse swallow type prescaler system PLL circuit from malfunctioning due to the delay of a module signal without using a device which performs high-speed operation or a device which has large power.

CONSTITUTION: A pulse swallow type prescaler system synthesizer consists of a PLL circuit part 2 including a PLL counter part 7 and a module pulse generating circuit part 8 and a prescaler circuit part 1 including a counting part 3, an extender part 4, and a module control circuit 5 performing module operation. The PLL circuit senses the logical state of a module pulse signal MD outputted from a module pulse signal generating circuit part 8 in response to the output of the PLL part counter 7 and outputs a module control signal MO controlling the module operation from the module control circuit part 5 in synchronism with the internal clock signal of the prescaler circuit part 1.