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Title:
PLL FREQUENCY SYNTHESIZER
Document Type and Number:
Japanese Patent JPH1198012
Kind Code:
A
Abstract:

To provide a fast PLL frequency synthesizer of a simple constitution which can set the frequency of a reference signal at the value larger than the frequency interval of the external output.

An n-order higher harmonic of the output of a voltage controlled oscillator 103 is transmitted through an HPF 105, and the output of the HPF 105 is divided down to 1/M by a variable frequency divider 104. The output of the divider 104 is compared with the phase of a reference signal by a phase comparator 101. The output of the comparator 101 is smoothed by a loop filter 102, and the output of the oscillator 103 is controlled by the output of the filter 102. Then the basic wave of output of the oscillator 103 is transmitted through a BPF 106 and outputted to the outside.


Inventors:
NAKATANI TOSHIBUMI
ADACHI HISASHI
KOSUGI HIROAKI
Application Number:
JP25242097A
Publication Date:
April 09, 1999
Filing Date:
September 17, 1997
Export Citation:
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Assignee:
MATSUSHITA ELECTRIC IND CO LTD
International Classes:
H03L7/18; H03L7/10; (IPC1-7): H03L7/18; H03L7/10
Domestic Patent References:
JPH01103820A1989-04-20
Attorney, Agent or Firm:
Masamichi Matsuda