Title:
POLISHING APPARATUS AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JP2006135045
Kind Code:
A
Abstract:
To ensure high reliability wiring connection by stabilizing voltage application from an electrode, and to attain in-plane uniformity of wafer by preventing a polishing residue of a Cu film.
The polishing apparatus is provided with a carrier 510 for holding a wafer 300; a polishing pad 530 which is provided opposite to the carrier 510 to electropolish the wafer 300; and an electrode sheet 570 which is arranged opposite to the polishing pad 530, namely on the opposite side of the carrier 510, and becomes a cathode electrode to be electrically energized between the polishing pad 530 and itself, while the polishing pad 530 is used as an anode electrode.
Inventors:
KONDO SEIICHI
Application Number:
JP2004321643A
Publication Date:
May 25, 2006
Filing Date:
November 05, 2004
Export Citation:
Assignee:
RENESAS TECH CORP
International Classes:
H01L21/304; B24B37/00
Domestic Patent References:
JP2003311540A | 2003-11-05 | |||
JP2003528219A | 2003-09-24 | |||
JP2003324088A | 2003-11-14 | |||
JPH03100987U | 1991-10-22 | |||
JP2004015028A | 2004-01-15 | |||
JP2003225831A | 2003-08-12 | |||
JP2004087760A | 2004-03-18 |
Attorney, Agent or Firm:
Tetsuma Ikegami
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