Title:
研磨パッド、両面研磨装置及びウェーハの両面研磨方法
Document Type and Number:
Japanese Patent JP7415888
Kind Code:
B2
Abstract:
The present invention is a polishing pad having a polishing layer for polishing surface of a wafer and a double-sided tape for attaching the polishing layer to an upper turn table of a double-side polishing apparatus, wherein, the double-sided tape has a 90° peeling adhesive strength A of 2000 g/cm or more, and a ratio A/B of the 90° peeling adhesive strength A to a 180° peeling adhesive strength B of 1.05 or more, the double-sided tape has a base material, a polishing-layer-side adhesive layer to be attached to the polishing layer, and an upper-turn-table-side adhesive layer to be attached to the upper turn table, and total thickness of the polishing-layer-side adhesive layer and the upper-turn-table-side adhesive layer is 80 μm or less. This provides a polishing pad capable of suppressing deterioration of flatness of the wafer when performing double-side polishing of the wafer.
Inventors:
Junichi Ueno
Application Number:
JP2020190714A
Publication Date:
January 17, 2024
Filing Date:
November 17, 2020
Export Citation:
Assignee:
Shin-Etsu Semiconductor Co., Ltd.
International Classes:
B24B37/22; B24B37/08; H01L21/304
Domestic Patent References:
| JP2005034940A | ||||
| JP2015038174A | ||||
| JP11503191A | ||||
| JP2015078348A | ||||
| JP2004323679A | ||||
| JP2011122069A | ||||
| JP2018107261A | ||||
| JP2004001160A |
Attorney, Agent or Firm:
Mikio Yoshimiya
Toshihiro Kobayashi
Toshihiro Kobayashi