PURPOSE: To operate a protective means with a reset time longer than the duration of overload state time measuring operation by counting high frequency clock, signals at the time of overload state time measuring operation whereas counting low frequency clock signals at the time of resetting to initial state.

CONSTITUTION: A counter 301 counts up 1/16 frequency divided clock pulse signals A under overload state whereas counts down clock pulse signals B, subjected to 1/32 frequency division for the count under overload state, if the overload state is released prior to interruption of power supply. Consequently, it takes double time for count down operation as compared with count up operation. If overload state takes place in the way of count down and the logical level of signal W goes 1, logical levels at all output terminals Q0-Q3 go 1 within a time reverse proportional to the count down time, and the output current from power supply is interrupted after duration of overload state for half of count down time.