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Patent Searching and Data


Title:
POWER AMPLIFIER
Document Type and Number:
Japanese Patent JPH09246890
Kind Code:
A
Abstract:

To prevent the generation of one-side clip by a rapid large input.

The two output signal of a BTL amplifier 18 are impressed to a power source circuit 27 after being added by an adder circuit 24. A second power source voltage Vcc generated from the power source circuit 27 changes corresponding to the adder circuit 24 and the change follows up the change of the output of the BTL amplifier 18. Then Vcc 2 is impressed to first and second output amplifiers 19a and 19b. Vcc 2 is impressed to the cathode of a diode 26 and when Vcc 2 is lower than a first power source voltage Vcc 1, Vcc 1 is impressed to the BTL amplifier 18 but when Vcc 2 is higher than Vcc 1, Vcc 2 is impressed to the BTL amplifier 18. In addition, a load is BTL- driven by a half-wave signal corresponding to the output signal of a first differential amplifier 10 the output DC voltage of which is set to be in a low level near an earth level, one-side clip is not generated even when a large input is impressed.


Inventors:
KOAKUTSU HIROSHI
SHIRASE TATSUO
Application Number:
JP5180696A
Publication Date:
September 19, 1997
Filing Date:
March 08, 1996
Export Citation:
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Assignee:
SANYO ELECTRIC CO
International Classes:
H03G3/20; H03F1/02; H03F3/68; (IPC1-7): H03F3/68; H03F1/02; H03G3/20
Attorney, Agent or Firm:
Kei Okada