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Title:
POWER FAILURE DETECTION METHOD
Document Type and Number:
Japanese Patent JPH1090314
Kind Code:
A
Abstract:

To detect a momentary power failure or a power failure with a residual voltage at high speed by comparing a difference of data at two sampling times spaced via one cycle of an a.c. voltage with a predetermined power failure judgment level.

A voltage of one phase of a three-phase power system detected by a voltage detector 21 is converted to a digital signal by an A/D converter 22, and sampled with a constant electric angle synchronous with the voltage. The data are sequentially stored in a memory 24. A processor 23 reads out data at the present sampling time and at the same sampling time of one earlier cycle and operates a deviation of the data. If no power failure occurs and a voltage waveform is normal, the deviation is zero. If a power failure takes place in one cycle, the deviation shows a certain value. A suitable power failure judgment level is set beforehand. The presence/absence of a power failure is detected by comparing the deviation with the level.


Inventors:
UMEZAWA KAZUYOSHI
Application Number:
JP24333196A
Publication Date:
April 10, 1998
Filing Date:
September 13, 1996
Export Citation:
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Assignee:
FUJI ELECTRIC CO LTD
International Classes:
G01R19/12; G01R19/155; G01R19/165; G01R19/25; H02J9/00; (IPC1-7): G01R19/165; G01R19/12; G01R19/155; G01R19/25; H02J9/00
Attorney, Agent or Firm:
Yuichi Morita



 
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