Title:
POWER FEEDER FOR ELECTRICALLY LUMINOUS PANEL
Document Type and Number:
Japanese Patent JPS6188491
Kind Code:
A
Abstract:
A transformerless solid state power supply is disclosed utilising a voltage multiplier (60) and an inhibitor circuit (69) at the output of the voltage multiplier. An inhibitor circuit (69) at the output of the voltage multiplier (60) is responsive to substantial voltage drop upon the occurrence of shorting of the lamp or panel to inhibit further oscillations and operation of the circuit.
Inventors:
NIKORASU TEE SHIMOPOUROSU
JIYOOJI NIKORASU SHIMOPOUROSU
GUREGORII NIKORASU SHIMOPOUROS
JIYOOJI NIKORASU SHIMOPOUROSU
GUREGORII NIKORASU SHIMOPOUROS
Application Number:
JP16695985A
Publication Date:
May 06, 1986
Filing Date:
July 30, 1985
Export Citation:
Assignee:
RUMINETSUSENTO ELECTRON INC
International Classes:
H02H7/122; H05B41/392; (IPC1-7): H05B33/08
Domestic Patent References:
| JPS453116Y1 | 1970-02-10 | |||
| JPS5124982A | 1976-02-28 | |||
| JPS5863083A | 1983-04-14 |
Attorney, Agent or Firm:
Katayama Dai
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