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Title:
POWER INTERRUPTION ALARM CIRCUIT
Document Type and Number:
Japanese Patent JP2000270466
Kind Code:
A
Abstract:

To provide a power interruption alarm circuit which is capable of suppressing the temperature rise by reducing currents consumed by the drive winding of a relay and which increases its reliability.

A series circuit comprising a thermistor 2 of a positive characteristic and the drive winding 1 of a relay 10 is connected between a power supply terminal 4 and a ground. The characteristics of the thermistor 2 and relay 10 are selected, such that when exciting current is supplied to the drive winding 1, a normally open contact 3 is released from an alarm output terminal 5, and when the resistance is caused to increase by the temperature rise of the thermistor 2, the amount of the exciting current is controlled to make the exciting current constant, at a point where the increase in the resistance of the thermistor 2 is balanced with its temperature rise controlled by the exciting current caused by the increase in the resistance and to make the exciting current at this point equal to or larger than the holding current of the relay 10. At power interruption, the normally open contact 3 is closed between the alarm output terminal 5 and grounding, so that an alarm output at power interruption is generated via the normally open contact 3.


Inventors:
OGAMI CHOJI
Application Number:
JP7052299A
Publication Date:
September 29, 2000
Filing Date:
March 16, 1999
Export Citation:
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Assignee:
NEC CORP
International Classes:
G08B21/00; H02H3/24; H02H5/04; H02H9/02; (IPC1-7): H02H5/04; G08B21/00; H02H3/24
Attorney, Agent or Firm:
Shigeru Noda



 
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