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Title:
深層学習人工ニューラルネットワークにおけるアナログニューラルメモリ用の電力管理
Document Type and Number:
Japanese Patent JP2022517810
Kind Code:
A
Abstract:
人工ニューラルネットワーク内の１つ以上のベクトル行列乗算（vector-by-matrix multiplication、ＶＭＭ）アレイを伴う様々な動作について、電力管理技術の多数の実施形態が開示されている。【選択図】図９

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Inventors:
Trang, Hugh, Van
Tiwari, bipin
Latency, mark
Doe, Nan
Application Number:
JP2021541296A
Publication Date:
March 10, 2022
Filing Date:
September 06, 2019
Export Citation:
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Assignee:
SILICON STORAGE TECHNOLOGY, INC.
International Classes:
G06G7/60; G06N3/063; G11C11/54; G11C16/04
Domestic Patent References:
JP2009211153A2009-09-17
JP2005122467A2005-05-12
JP2004157755A2004-06-03
JP2005175070A2005-06-30
JPH06119566A1994-04-28
JP2001211211A2001-08-03
JP2009135623A2009-06-18
Foreign References:
WO2017200883A12017-11-23
Attorney, Agent or Firm:
Patent Business Corporation Wisdom International Patent Office



 
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