Title:
集積回路のための電力マルチプレクサ
Document Type and Number:
Japanese Patent JP6408192
Kind Code:
B2
Abstract:
An integrated circuit is provided with a low-power island including embedded memory power domains that may selectively couple to either an active-mode power supply voltage supplied on a first power rail or to a sleep-mode power supply voltage supplied on a second power rail.
Inventors:
Cao, Lipen
Kaji, Tau Thief
Artieri, Alan Dominique
Kaji, Tau Thief
Artieri, Alan Dominique
Application Number:
JP2018510503A
Publication Date:
October 17, 2018
Filing Date:
July 21, 2016
Export Citation:
Assignee:
QUALCOMM INCORPORATED
International Classes:
G06F12/00; G06F1/32; G11C5/14
Domestic Patent References:
| JP2014067191A | ||||
| JP2010263194A | ||||
| JP2009289308A |
Foreign References:
| US20030233588 |
Attorney, Agent or Firm:
Kurata Masatoshi
Yoshihiro Fukuhara
Morisezo Iseki
Takashi Okada
Nakamaru Yoshihiro
Yoshihiro Fukuhara
Morisezo Iseki
Takashi Okada
Nakamaru Yoshihiro