To provide a power saving control system capable of reducing power consumption in the low power consumption mode of electronic equipment to be shifted in a stand-by status, and detecting a restoration event to a normal operation mode in an electronic apparatus using an LSI with a plurality of CPU cores built-in.

This power saving control system is configured to operate one CPU core 102 for detecting a restoration event to a normal operation mode among a plurality of CPU cores with a clock frequency which is lower than that in a normal operation mode, and to operate the other CPU core 103 in a low power consumption mode set in the CPU core. As for the clock frequency to be supplied to the CPU core continuously operating in the low power consumption mode of equipment, the other CPU core controls the frequency change of a clock oscillator.