To make a power source detection circuit preventible from outputting an error signal caused by the rise of an output voltage A exceeding a reference voltage at the time of quick rise, by comparing the output voltage A of a power source spliting circuit 30 linearly spliting the power source voltage and the reference voltage B of a reference voltage circuit 31 with a comparator circuit 32 for detecting the power source and outputting the signal.
Between the power source spliting circuit 30 and the comparator circuit 32, a source terminal is connected to the output terminal of the power source split circuit 30 and on the other hand, a PMOS transistor 41 is put in so that a drain terminal is connected to the input terminal of the comparator circuit 32 and a gate terminal is connected to the ground side. Until the output voltage A becomes higher than a threshold voltage of the transistor 41, the connection between the source and drain is made to be in an OFF state and the input to the comparator circuit 32 of the output voltage signal is made invalid.
KAJIWARA JUN
SAKIYAMA SHIRO
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