PURPOSE: To eliminate a stationary penetrating current and to detect even a short-time power source noise of about several tens of ns being generated by providing a CR time constant circuit which delays variations in the potentials of the source of a 1st MOS transistor(TR) and a substrate when the power source noise is generated.

CONSTITUTION: A 1st P-channel TR TP1 and a 1st N-channel TR TN1 are normally off, and a 2nd N-channel TR TN2 and a 2nd P-channel TR TN1 are off, and a node A is at a VDD potential, a node B is at a ground potential, and a node C is at a VDD potential. In this state, if the VDD potential drops by more than the gate threshold value VTHF of the P-channel TRs with some reason, the potential of the node A does not fall soon because of a resistance R and a capacitor C and the potentials of the source of the P-channel TR TP1 and the substrate are still the VDD potential; and only the gate potential falls, so the TR turns on. Therefore, there is no stationary penetrating current generated and the generation of even a short-time power source noise of about several tens of ns can be detected.