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Title:
POWER SUPPLY CIRCUIT OF AMPLIFIER
Document Type and Number:
Japanese Patent JPS5880905
Kind Code:
A
Abstract:

PURPOSE: To prevent evil influence of power source variation upon an output signal while improving the efficiency of power source conversion, by using a voltage source or a voltage obtained by shifting an output signal level by a prescribed value as the collector power source of a transistor (TR) for amplification.

CONSTITUTION: In a power supply circuit, when the level of an output signal v0 is low and the absolute values of power source ±E1 are greater thanv0±VD (where VD is voltages of Zener diodes ZD1 and ZD2), differential TRs Q6 and Q8 turn on, so TRs Q5 and Q7 are still turned off. Since TRs Q3 and Q4 are also turned off, power voltages ±E1 are supplied to collectors of TRs Q1 and Q2. On the other hand, when the output signal v0 increases in level andv0±VDbecomes greater than the power voltages ±E1, the TRs Q5 and Q7 turn on to generate a control signal corresponding to a difference in quantity level. This control signal is base inputs to the TRs Q3 and Q4, which output voltages which are in phase with the output signal v0 and have levels v0±VD.


Inventors:
OOKAWA SHIGERU
Application Number:
JP17941381A
Publication Date:
May 16, 1983
Filing Date:
November 09, 1981
Export Citation:
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Assignee:
PIONEER ELECTRONIC CORP
International Classes:
H03F1/02; H03F3/20; H03F3/21; (IPC1-7): H03F1/02; H03F3/21
Domestic Patent References:
JPS5620313A1981-02-25
Attorney, Agent or Firm:
Fujihiko Motohiko



 
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