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Title:
PREDISTORTION CIRCUIT
Document Type and Number:
Japanese Patent JP2001267852
Kind Code:
A
Abstract:

To compensate also the non-linear characteristic of a phase.

A FET12 and a phase compensating capacitor Cp are respectively connected between a buffer amplifier 11 and earth and between an auxiliary amplifier 14 and earth. The differential resistance of the FET12 impressing a prescribed bias voltage to a gate electrode is exponentially functionally raised to the right when voltage between the drain and source of the FET12 is increased and the differential resistance is reduced when the voltage between the gate and source is increased. A current amount to be branched to the capacitor Cp is changed in accordance with the level of the differential resistance. Thus the non-linear characteristics of the amplitude and phase of a saturated amplifier 3 can be compensated to almost linear states by utilizing the differential resistance and the non-linear characteristic of the current amount branched to the capacitor Cp.


Inventors:
KITAMURA KEIICHI
Application Number:
JP2000080163A
Publication Date:
September 28, 2001
Filing Date:
March 22, 2000
Export Citation:
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Assignee:
YRP KOKINO IDOTAI TSUSHIN KENK
International Classes:
H03F1/32; H03F3/24; (IPC1-7): H03F1/32; H03F3/24
Attorney, Agent or Firm:
Yasuo Asami (3 outside)