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Title:
PREPARATION OF SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPH0414851
Kind Code:
A
Abstract:

PURPOSE: To prevent residue of Al film from being generated as a result of side wall forming and to protect interelectrode short circuit by coating the scribe line with SiO2 film.

CONSTITUTION: An SI substrate 7 that has been formed with field SiO2 film 8 is coated with the first poly-Si film 9 by the CVD method, is treated by patterning, and the lead electrodes are formed for the base and collector. Then, either the base electrode or the collector elecrodes is selectively oxidated using poly-Si film 9 to form element separation SiO2 film 10, thereby separating the base electrode from the collector electrode. Next, after interlayer SiO2 film 11 is coated, anisotropic etching by the RIE is applied to the interlayer SiO2 film 11 and the first poly-Si film 9 to form an opening 12 in the emitter area and at the same time to remove the area surrounding a scribe line 14 completely. When the SiO2 film is coated, only the area of the scribe line 14 is masked by resist film 16 so as to treat the SiO2 film by the RIE method using the anisotropic SiO2 film, remaining SiO2 film 15 is formed as side wall 15A in the emitter electrode forming area and as scribe line SiO2 film 15B, respectively.


Inventors:
INAGAKI TAKU
Application Number:
JP11838390A
Publication Date:
January 20, 1992
Filing Date:
May 08, 1990
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
H01L21/301; H01L21/78; (IPC1-7): H01L21/78
Attorney, Agent or Firm:
Sadaichi Igita



 
Next Patent: JPH0414852