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Patent Searching and Data


Title:
PRESCALER
Document Type and Number:
Japanese Patent JPH10154929
Kind Code:
A
Abstract:

To prevent the occurrence of malfunction due to fluctuation in an input level by extending the operating region with respect to the input level.

An input signal S1 from a voltage controlled oscillator (VCO) 4 is given to an input terminal 15 of a prescaler chip 1, amplified by an input buffer amplifier 14, given to a frequency divider circuit 11, in which the signal is frequency-divided to a prescribed frequency and outputted via an output buffer amplifier 12. A detection diode 2 detects a level of a signal S3 given to the frequency divider circuit 11. A level control circuit 3 controls a bias current of a PIN diode 13 in response to a detection output of the detection diode, that is, the input signal level of the frequency divider circuit 11 to control it that the input signal level of the frequency divider circuit 11 is constant. The PIN diode 13 is controlled by the level control circuit 3 via a level control terminal 17 to attenuate the input signal S1.


Inventors:
NEMOTO KOJI
Application Number:
JP31330996A
Publication Date:
June 09, 1998
Filing Date:
November 25, 1996
Export Citation:
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Assignee:
NEC FUKUSHIMA LTD
International Classes:
H03K21/40; (IPC1-7): H03K21/40
Attorney, Agent or Firm:
Naoki Kyomoto (2 outside)