Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
PREVENTING CIRCUIT FOR FREE-RUNNING OSCILLATION OF FREQUENCY DIVIDER
Document Type and Number:
Japanese Patent JPS6441330
Kind Code:
A
Abstract:

PURPOSE: To prevent surely the free-funning oscillation by applying in advance a DC offset so that 2-signal of a master flip-flop and a slave flip-flop is inputted when the hold side of a differential switch of each flip-flop is in a no-singal input state.

CONSTITUTION: A DC offset V0' is provided to base potentials of transistors(TRs) Q21, Q22, that is, potentials P2', P1' corresponding to emitter followers E1, E2. Thus, the TR Q2 is turned on and the TR Q1 is turned off in a 1st differential switch circuit S1 in the no-signal input state, the TR Q9 is turned on and the TR Q10 is turned off in the 4th differential switch circuit S4. Thus, the free-running oscillation is prevented for both the master flip-flop A1 and the slave flip-flop A2.


More Like This:
JP4197532counter
JPS5672540COUNTER CIRCUIT
Inventors:
MIYAHARA YASUTOKU
Application Number:
JP19710187A
Publication Date:
February 13, 1989
Filing Date:
August 06, 1987
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
TOSHIBA CORP
International Classes:
H03K23/00; H03K23/52; (IPC1-7): H03K23/52
Attorney, Agent or Firm:
Takehiko Suzue



 
Previous Patent: ターゲット作製

Next Patent: JPS6441331