Title:
PRINTED CIRCUIT BOARD POLISHING METHOD
Document Type and Number:
Japanese Patent JP2000190197
Kind Code:
A
Abstract:
To polish a printed circuit board effectively.
A bulged part of an ink put in a hole formed in a printed circuit board (work) W is polished by a rotary polishing tool 20 while the printed circuit board W is being transported, wherein the board transporting speed Vp should range between 1 and 5 m/min, and the ratio Vf/Vp is made 300-800, where Vf represents the peripheral velocity of the polishing tool 20 in rotating and ranges between 1000 and 1200 m/min.
Inventors:
SUDA SHIGEO
Application Number:
JP37103998A
Publication Date:
July 11, 2000
Filing Date:
December 25, 1998
Export Citation:
Assignee:
NIPPON COATED ABUREESHIBU KK
International Classes:
B24B7/06; B24B29/02; H05K3/22; H05K3/26; (IPC1-7): B24B29/02; B24B7/06; H05K3/22; H05K3/26
Attorney, Agent or Firm:
Hidehiko Okada (6 outside)
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